Anna University COMPUTER ORGANIZATION AND ARCHITECTURE Two marks unit 2
1.Give the symbol of a full adder circuit for a single stage addition
2.Give the representation for n bit ripple carry adder
3. Write down the Booth’s algorithm
4.What are the 2 ways to detect overflow in an n-bit adder?
Overflow can occur when the signs of two operands are the same. Overflow occurs when the carry bits Cn and Cn-1 are different.
5.What is the delay encountered for Cn-1, Sn-1 and Cn in the FA for a single stage
Cn-1 – 2(n-1)
Sn-1 – 2(n-1)+1
Cn – 2n
6.What is the delay encountered for all the sum bits in n-bit binary addition/subtraction logic unit?
The gate delays with and without overflow logic are 2n+2 and 2n respectively
7.Write down the basic generate and propagate functions for stage i
Gi = XiYi, Pi=Xi xor with Yi
8.Write down the general expression for Ci+1 using first level generate and propagate function
Ci+1 = Gi+PiGi-1+PiPi-1Gi-2+…+PiPi-1…P1G0+PiPi-1…P0G0
9.What are the two approaches to reduce delay in adders
10.What is the delay encountered in the path in an n x n array multiplier
The delay encountered in the path in an n x n array multiplier is 6(n-1)-1
11.What is skipping over of one’s in Booth decoding?
The Transformation 011… 110= +100…0 – 10 is called skipping over one’s.In his case multiplier has its ones grouped into a few contiguous blocks.
12.What are the two attractive features of Booth algorithm
13. Give an example for the worst case of Booth algorithm
The worst case is shown as below
0 1 0 1 0 1 0 1 0
+1-1+1-1+1-1+1-1+1
In the worst case each bit of the multiplier selects the summands. This results in more number of summands.
14. What are the two techniques for speeding up the multiplication operation?
15. How bit pair recoding of multiplier speeds up the multiplication process?
It guarantees that the maximum number of summands that must be added is n/2 for nbit operands.
16. How CSA speeds up multiplication?
It reduces the time needed to add the summands. Instead of letting the carries ripple along the rows, they can be saved and introduced into the next row, at the correct waited position.
17. Write down the levels of CSA steps needed to reduce k summands to two vectors in CSA
The number of levels can be shown by 1.7log2k-1.7
18.What is the advantage of non restoring over restoring division?
Non restoring division avoids the need for restoring the contents of register after
an successful subtraction.
19. Write down the steps for restoring division and non-restoring division Non-Restoring:
Step1: Do the following n times
1.If the sign of A is 0, shift A and Q left one bit position and subtract M from A otherwise shift A and Q left and add M to A.
2.Now if the sign of A is 0, set Q0 to 1; otherwise set Q0 to 0
Step 2: If the sign of A is 1, add M to A
Restoring:
20.What is the need for adding binary 8 value to the true exponential in floating point numbers?
This solves the problem of negative exponent.Due to this the magnitude of the
numbers can be compared.The excess-x representation for exponents enables efficient
comparison of the relative sizes of the two floating point numbers.
21.Briefly explain the floating point representation with an example?
The floating point representation has 3 fields
1.sign bit
2.significiant bits
3.exponent
For example consider 1.11101100110 x 10^5,
Mantissa=11101100110
Sign=0
Exponent=5
22.What are the 2 IEEE standards for floating point numbers?
1.single
2.double
23.What is overflow, underflow case in single precision(sp)?
Underflow-In SP it means that the normalized representation requires an exponent
less than -126.
Overflow- In SP it means that the normalized representation requires an exponent
greater than +127.
24.What are the exceptions encounted for FP operation?
The exceptions encounted for FP operation are overflow,underflow,/0,inexact and invalid values.
25.What is guard bits?
Guard bits are extra bits which are produced during the intermediate steps to yield maximum accuracy in the final results.
26.What are the ways to truncate guard bits?
1.Chopping
2.Von Neumann rounding
3.Rounding procedure
2. Explain the sequential circuit binary multiplier and give an example for it.
A = 010111
B = 101100
5.Perform division on the following 5-bit unsigned integer using Restoring and NonRestoring division:
10101 / 00101
6.Expalin 4X4 array multiplier. What is the delay in this case?
7. Explain the various types of Adders.
8. Explain the various multiple bit Adders
9. Explain the Floating-point arithmetic operations.
10. Explain Booth algorithm for signed-operand multiplication.
11. Explain the design of fast adders with neat diagrams.
The data and address lines of the external memory bus connected to the internal processor bus via the memory data register, MDR, and the memory address register, MAR, respectively. Register MDR has two inputs and two outputs. Data may be loaded into MDR either from the memory bus or from the internal processor bus. The data stored in MDR may be placed on either bus. The input of MAR is connected to the internal bus, and its output is connected to the external bus.
2) Name two special purpose registers.
• Index register
• Stack pointer
3) Define datapath.
The registers, the ALU, and the interconnecting bus are collectively referred to as the datapath.
4) Describe the two control signals used for register transfer.
For each register, two control signals are used to place the contents of that register on the bus or to load data on the bus into the register. The input and output of register Ri are connected to the bus via switches controlled by the signals Riin and Riout, respectively. When Riin is set to 1, the data on the bus are loaded into Ri. Similarly, when Riout is set to 1, the contents of register Ri are placed on the bus. While Riout is equal to 0, the bus can be used for transferring data from other registers.
5) Define processor clock.
Processor clock is defined as the time periods in which all operations and data transfers with in the processor take place.
6) What is known as multiphase clocking?
When edge-triggered flip flops are not used, two or more clock signals may be needed to guarantee proper transfer of data. This is known as multiphase clocking.
7) Define MFC.
To accommodate the variability in response time, the processor waits until it receives an indication that the requested read operation has been completed. The control signal used for this purpose is known as Memory-Function-Completed (MFC).
8) What is WMFC.
WMFC is the control signal that causes the processor’s control circuitry to wait for the arrival of the MFC signal.
9) Define register file.
All general purpose registers are combined into a single block called the register file.
10) What is mean by branch instruction.
A branch instruction is an instruction which replaces the contents of the PC with the branch target address. This address is usually obtained by adding an offset X, which is given in the branch instruction, to the updated value of the PC. The location following a branch instruction is called a branch delay slot.
11) What are the two approaches used for generating the control signals in proper sequence?
• Hardwired control
• Microprogrammed control
12) What are the factors determine the control signals?
1.Contents of the control step counter
2.Contents of the instruction register
3.Contents of the condition code flags
4.External input signals, such as MFC and interrupt requests
13) Explain hardwired control.
The control hardwire can be viewed as a state machine that changes from one state to another in every clock cycle, depending on the contents of the instruction register, the condition codes, and the external inputs. The outputs of the state machine are the control signals. The sequence of operations carried out by this machine is determined by the wiring of the logic elements, hence the name “hardwired”.
14) What are the features of the hardwired control.
A controller that uses this approach can operate at high speed. It has little flexibility and the complexity of the instruction set it can implement is limited.
15) What is microprogrammed control?
Microprogrammed control is a scheme in which control signals are generated by a program similar to machine language programs.
16) What is control word?
A control word is a word whose individual bits represent the various control signals.
17) Define microroutine and microinstruction.
A sequence of control words corresponding to the control sequence of a machine instruction constitutes the microroutine for that instruction, and the individual control words in this microroutine are referred to as microinstructions.
18) What is control store?
The microroutines for all instructions in the instruction set of a computer are stored in a special memory called the control store.
19) What is the drawback of assigning one bit position to each control signal?
Assigning individual bits to each control signal results in long microinstructions because the number of required signals is usually large. Moreover, only a few bits are set to 1in any given microinstruction, which means the available bit space is poorly used.
20) Name some register output control signals.
Pcout, MDRout, Zout, Offsetout, R0out, R1out, R2out, R3out, and TEMPout
21) What is vertical organization and horizontal organization?
Highly encoded schemes that use compact codes to specify only a small number of control functions in each microinstruction are referred to as a vertical organization. On the other hand, the minimally encoded scheme in which many resources can be controlled with a single microinstruction is called a horizontal organization.
22) Compare vertical organization and horizontal organization.
Vertical organization Horizontal organization
1. Highly encoded schemes
2. Specify only a small number of control signals.
3. Operating speed is high. Minimally encoded schemes
Many resources can be controlled.
Operating speed is low.
23) Explain bit-O-Ring technique.
The micro program shows that branches are not always made to a single branch address. This is a direct consequence of combining simple micro routines by sharing common parts. Consider a point in the microprogram sequencing. At this point, it is necessary to choose between actions required by direct and indirect addressing modes. If the indirect mode is specified in the instruction, then the microinstruction in the location 170 is performed to fetch the operand from the memory. If the direct mode is specified, this fetch must be bypassed by branching immediately to location 171. The most efficient way to bypass microinstruction 170 is to have the preceding branch microinstructions specify the address 170 and then use an OR gate to change the least significant bit of this address to 1if the direct addressing mode is involved. This is known as the bit-Oring technique for modifying branch addresses.
24) Define emulation.
Given a computer with a certain instruction set, it is possible to define additional machine instructions and implement them with extra micro routines. Emulation allows us to replace obsolete equipment with more up to date machines. If the replacement computer fully emulates the original one, then no software changes have to be made to run existing programs. Thus, emulation facilitates transitions to new computer systems with minimal disruption.
25) What is the drawback of microprogrammed control?
It leads to a slower operating speed because of the time it takes to fetch microinstructions from the control store.
• Diagram for basic organization
• Explanation
• Flowchart for Add Src, Rdst
2.Draw the organization of a single-bus processor and give the control sequences for fetching a word from memory, storing a word in memory, executing a complete instruction and unconditional and conditional branch.
• Diagram
• Control Sequences
3.Explain the basic organization of a Hardwired control unit. Mention its advantages and disadvantages.
• Diagram for basic organization
• Explanation
• Advantages
• Disadvantages
UNIT II
PART-A
ARITHMETIC UNIT
1.Give the symbol of a full adder circuit for a single stage addition
2.Give the representation for n bit ripple carry adder
3. Write down the Booth’s algorithm
| Multiplier | Version of Multiplicand selected by bit i | |
| Bit i | Bit i-1 | |
| 0 | 0 | 0 x M |
| 0 | 1 | +1 x M |
| 1 | 0 | -1 x M |
| 1 | 1 | 0 x M |
4.What are the 2 ways to detect overflow in an n-bit adder?
Overflow can occur when the signs of two operands are the same. Overflow occurs when the carry bits Cn and Cn-1 are different.
5.What is the delay encountered for Cn-1, Sn-1 and Cn in the FA for a single stage
Cn-1 – 2(n-1)
Sn-1 – 2(n-1)+1
Cn – 2n
6.What is the delay encountered for all the sum bits in n-bit binary addition/subtraction logic unit?
The gate delays with and without overflow logic are 2n+2 and 2n respectively
7.Write down the basic generate and propagate functions for stage i
Gi = XiYi, Pi=Xi xor with Yi
8.Write down the general expression for Ci+1 using first level generate and propagate function
Ci+1 = Gi+PiGi-1+PiPi-1Gi-2+…+PiPi-1…P1G0+PiPi-1…P0G0
9.What are the two approaches to reduce delay in adders
- Fastest electronic technology in implementing the ripple carry logic design
- Augmented logic gate network
10.What is the delay encountered in the path in an n x n array multiplier
The delay encountered in the path in an n x n array multiplier is 6(n-1)-1
11.What is skipping over of one’s in Booth decoding?
The Transformation 011… 110= +100…0 – 10 is called skipping over one’s.In his case multiplier has its ones grouped into a few contiguous blocks.
12.What are the two attractive features of Booth algorithm
- It handles both positive and negative multipliers uniformly
- It achieves some efficiency in the number of additions required when the multiplier has a few large blocks of ones
13. Give an example for the worst case of Booth algorithm
The worst case is shown as below
0 1 0 1 0 1 0 1 0
+1-1+1-1+1-1+1-1+1
In the worst case each bit of the multiplier selects the summands. This results in more number of summands.
14. What are the two techniques for speeding up the multiplication operation?
- Bit Pair recoding
- CSA
15. How bit pair recoding of multiplier speeds up the multiplication process?
It guarantees that the maximum number of summands that must be added is n/2 for nbit operands.
16. How CSA speeds up multiplication?
It reduces the time needed to add the summands. Instead of letting the carries ripple along the rows, they can be saved and introduced into the next row, at the correct waited position.
17. Write down the levels of CSA steps needed to reduce k summands to two vectors in CSA
The number of levels can be shown by 1.7log2k-1.7
18.What is the advantage of non restoring over restoring division?
Non restoring division avoids the need for restoring the contents of register after
an successful subtraction.
19. Write down the steps for restoring division and non-restoring division Non-Restoring:
Step1: Do the following n times
1.If the sign of A is 0, shift A and Q left one bit position and subtract M from A otherwise shift A and Q left and add M to A.
2.Now if the sign of A is 0, set Q0 to 1; otherwise set Q0 to 0
Step 2: If the sign of A is 1, add M to A
Restoring:
- Shift A and Q left one binary position
- Subtract M from A
- If the sign of A is one , set Q0 to 0, add M back to A otherwise set Q0 to 1
20.What is the need for adding binary 8 value to the true exponential in floating point numbers?
This solves the problem of negative exponent.Due to this the magnitude of the
numbers can be compared.The excess-x representation for exponents enables efficient
comparison of the relative sizes of the two floating point numbers.
21.Briefly explain the floating point representation with an example?
The floating point representation has 3 fields
1.sign bit
2.significiant bits
3.exponent
For example consider 1.11101100110 x 10^5,
Mantissa=11101100110
Sign=0
Exponent=5
22.What are the 2 IEEE standards for floating point numbers?
1.single
2.double
23.What is overflow, underflow case in single precision(sp)?
Underflow-In SP it means that the normalized representation requires an exponent
less than -126.
Overflow- In SP it means that the normalized representation requires an exponent
greater than +127.
24.What are the exceptions encounted for FP operation?
The exceptions encounted for FP operation are overflow,underflow,/0,inexact and invalid values.
25.What is guard bits?
Guard bits are extra bits which are produced during the intermediate steps to yield maximum accuracy in the final results.
26.What are the ways to truncate guard bits?
1.Chopping
2.Von Neumann rounding
3.Rounding procedure
PART-B
1.Explain in detail the principle of Carry look ahead adder?- Generate function
- Propagate function
- 4-bit carry look-ahead adder
2. Explain the sequential circuit binary multiplier and give an example for it.
- Explanation
- Diagram
- Rules
- Diagram
- Explanation
A = 010111
B = 101100
5.Perform division on the following 5-bit unsigned integer using Restoring and NonRestoring division:
10101 / 00101
6.Expalin 4X4 array multiplier. What is the delay in this case?
- Explanation
- Diagram
7. Explain the various types of Adders.
- Half Adder
- Truth Table
- Explanation
- Full Adder
- Truth Table
- Explanation
8. Explain the various multiple bit Adders
- Carry look-ahead adders
- Ripple carry adder
- Look ahead carry unit
9. Explain the Floating-point arithmetic operations.
- Addition
- Multiplication
10. Explain Booth algorithm for signed-operand multiplication.
- Algorithm
- Explanation with example
11. Explain the design of fast adders with neat diagrams.
- Diagram
- Explanation
2 Marks
Explain MDR and MAR.The data and address lines of the external memory bus connected to the internal processor bus via the memory data register, MDR, and the memory address register, MAR, respectively. Register MDR has two inputs and two outputs. Data may be loaded into MDR either from the memory bus or from the internal processor bus. The data stored in MDR may be placed on either bus. The input of MAR is connected to the internal bus, and its output is connected to the external bus.
2) Name two special purpose registers.
• Index register
• Stack pointer
3) Define datapath.
The registers, the ALU, and the interconnecting bus are collectively referred to as the datapath.
4) Describe the two control signals used for register transfer.
For each register, two control signals are used to place the contents of that register on the bus or to load data on the bus into the register. The input and output of register Ri are connected to the bus via switches controlled by the signals Riin and Riout, respectively. When Riin is set to 1, the data on the bus are loaded into Ri. Similarly, when Riout is set to 1, the contents of register Ri are placed on the bus. While Riout is equal to 0, the bus can be used for transferring data from other registers.
5) Define processor clock.
Processor clock is defined as the time periods in which all operations and data transfers with in the processor take place.
6) What is known as multiphase clocking?
When edge-triggered flip flops are not used, two or more clock signals may be needed to guarantee proper transfer of data. This is known as multiphase clocking.
7) Define MFC.
To accommodate the variability in response time, the processor waits until it receives an indication that the requested read operation has been completed. The control signal used for this purpose is known as Memory-Function-Completed (MFC).
8) What is WMFC.
WMFC is the control signal that causes the processor’s control circuitry to wait for the arrival of the MFC signal.
9) Define register file.
All general purpose registers are combined into a single block called the register file.
10) What is mean by branch instruction.
A branch instruction is an instruction which replaces the contents of the PC with the branch target address. This address is usually obtained by adding an offset X, which is given in the branch instruction, to the updated value of the PC. The location following a branch instruction is called a branch delay slot.
11) What are the two approaches used for generating the control signals in proper sequence?
• Hardwired control
• Microprogrammed control
12) What are the factors determine the control signals?
1.Contents of the control step counter
2.Contents of the instruction register
3.Contents of the condition code flags
4.External input signals, such as MFC and interrupt requests
13) Explain hardwired control.
The control hardwire can be viewed as a state machine that changes from one state to another in every clock cycle, depending on the contents of the instruction register, the condition codes, and the external inputs. The outputs of the state machine are the control signals. The sequence of operations carried out by this machine is determined by the wiring of the logic elements, hence the name “hardwired”.
14) What are the features of the hardwired control.
A controller that uses this approach can operate at high speed. It has little flexibility and the complexity of the instruction set it can implement is limited.
15) What is microprogrammed control?
Microprogrammed control is a scheme in which control signals are generated by a program similar to machine language programs.
16) What is control word?
A control word is a word whose individual bits represent the various control signals.
17) Define microroutine and microinstruction.
A sequence of control words corresponding to the control sequence of a machine instruction constitutes the microroutine for that instruction, and the individual control words in this microroutine are referred to as microinstructions.
18) What is control store?
The microroutines for all instructions in the instruction set of a computer are stored in a special memory called the control store.
19) What is the drawback of assigning one bit position to each control signal?
Assigning individual bits to each control signal results in long microinstructions because the number of required signals is usually large. Moreover, only a few bits are set to 1in any given microinstruction, which means the available bit space is poorly used.
20) Name some register output control signals.
Pcout, MDRout, Zout, Offsetout, R0out, R1out, R2out, R3out, and TEMPout
21) What is vertical organization and horizontal organization?
Highly encoded schemes that use compact codes to specify only a small number of control functions in each microinstruction are referred to as a vertical organization. On the other hand, the minimally encoded scheme in which many resources can be controlled with a single microinstruction is called a horizontal organization.
22) Compare vertical organization and horizontal organization.
Vertical organization Horizontal organization
1. Highly encoded schemes
2. Specify only a small number of control signals.
3. Operating speed is high. Minimally encoded schemes
Many resources can be controlled.
Operating speed is low.
23) Explain bit-O-Ring technique.
The micro program shows that branches are not always made to a single branch address. This is a direct consequence of combining simple micro routines by sharing common parts. Consider a point in the microprogram sequencing. At this point, it is necessary to choose between actions required by direct and indirect addressing modes. If the indirect mode is specified in the instruction, then the microinstruction in the location 170 is performed to fetch the operand from the memory. If the direct mode is specified, this fetch must be bypassed by branching immediately to location 171. The most efficient way to bypass microinstruction 170 is to have the preceding branch microinstructions specify the address 170 and then use an OR gate to change the least significant bit of this address to 1if the direct addressing mode is involved. This is known as the bit-Oring technique for modifying branch addresses.
24) Define emulation.
Given a computer with a certain instruction set, it is possible to define additional machine instructions and implement them with extra micro routines. Emulation allows us to replace obsolete equipment with more up to date machines. If the replacement computer fully emulates the original one, then no software changes have to be made to run existing programs. Thus, emulation facilitates transitions to new computer systems with minimal disruption.
25) What is the drawback of microprogrammed control?
It leads to a slower operating speed because of the time it takes to fetch microinstructions from the control store.
16 Marks
1.Give the basic organization of a Microprogrammed control unit. Draw a flowchart of a micro routine for the instruction Add Src, Rdst.• Diagram for basic organization
• Explanation
• Flowchart for Add Src, Rdst
2.Draw the organization of a single-bus processor and give the control sequences for fetching a word from memory, storing a word in memory, executing a complete instruction and unconditional and conditional branch.
• Diagram
• Control Sequences
3.Explain the basic organization of a Hardwired control unit. Mention its advantages and disadvantages.
• Diagram for basic organization
• Explanation
• Advantages
• Disadvantages
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